1. Field of the Invention
The present invention relates to a system for efficiently interfacing with display data using a single-chip module consisting of a Micro-Processor Unit (MPU) and a video CODEC. More specially, it relates to a technology of effectively displaying GUI data and video data through LCD interfaces, respectively equipped in both of MPU and video CODEC, when two individual chips of MPU and video CODEC are incorporated into a single-chip module.
2. Description of the Related Art
Recently a system composed of a MPU and a video CODEC is used for a multimedia application. It is required for more various applications to process a large amount of GUI data generated in a MPU and video data generated in a video CODEC. Namely, a low transfer rate between a MPU and a video CODEC makes a lot of troubles in efficiently displaying various GUI data and decoding video data through an interface between them.
Therefore, it is required to properly interface between a MPU and a video CODEC in order to efficiently display GUI data of MPU and decoding video data of video CODEC in a multimedia application using a MPU chip and a video CODEC chip.
There are two methods to perform a display. The first method is to make a display through an external input/output (I/O) as shown in FIG. 1 and the second one is to perform a display by using a specific video interface chip as illustrated in FIG. 2. Herein, a main body for displaying video data and GUI data could be a MPU or a video CODEC in video display.
FIG. 1 is a block diagram designed with a video CODEC as a main body for displaying. Display data like GUI data is generally transmitted from a Micro Processor Unit (MPU) 10 to video CODEC 20 through an external I/O interface in order to display GUI data generated in a MPU. General reference numeral 30 in FIG. 1 denotes a LCD driver.
Herein, the MPU 10 saves GUI data in a display memory inside a video CODEC 20 through an external I/O interface and then perform a display.
When a MPU 10 acts as a main body for displaying, a display is performed by transmission of decoding video data generated in video CODEC 20 through an external I/O interface. Moreover, simultaneous display of display data transmitted from a MPU 10 and video CODEC 20 is performed by using a proper interface inside a video CODEC 20.
FIG. 2 illustrates that a display is made through using a specific video interface chip. A display is performed by CYPRO 40, supporting an external I/O interface to MPU 10 and CCIR656 interface to video CODEC 20, among specific video interface chips.
As mentioned above, a conventional system configured in FIG. 1 causes a problem of low transfer rate in transmitting a large amount of decoding video data of video CODEC and GUI data of MPU. Namely, much access time is required for a MPU to access a video display memory inside a video CODEC through an external I/O. Therefore such low transfer rate causes a degradation of performance of video CODEC and seriously restrictive factors putting limitation on multimedia application.
A system using an extra video interface chip shown in FIG. 2 can solve a problem of low transfer rate of a system in FIG. 1, but consequently requires a raise of cost for a specific video interface chip. Therefore, a video interface chip is losing competitiveness in performance and cost, and very restrictively used in a specific multimedia application. Similarly a MPU interface is restrictive to a specific portion of general micro-processor units, which causes limitation in selecting a MPU.